Our team set out to create a cat and mouse game on an FPGA. The user controls a mouse and tries to evade the cat. Through this game we tried to expand our knowledge of Computer Architecture by coding it in Verilog. Verilog is a hardware simulation language that determines the arrangement of the many gates on an FPGA. The most interesting challenges we faced were due to the limitations and nuances of hardware implementation.

We tried to simulate an object oriented programming language by creating an animal module and a world module that contains many animals. The animal module keeps track of the position and direction of that animal. The world module pipes that information into the module for the cat. Our project was a success; the site has a demo and downloadable code.