FPGAs All The Way!
Group members for /VideoFpgaProject: Joy Poisel, Kate Cummings, Chris Murphy
Group members for more theoretical project: Sarah Zwicker, Kathy King
Contents
Resources -- MarkChang
Here is one paper, written by a close friend, that is a good review of reconfigurable computing and FPGA devices in general. At 40 pages, it is quite the read. However, you don't have to read the whole thing. -- MarkChang
You are welcome to come into my office and pick up proceedings that I have from the FPGA, FCCM, and FPL conferences. Also, you can grab some of the hardware from the same shelf in the white boxes. Just leave a note.
Interesting FPGA computer architecture links:
What hardware do we have? -- MarkChang
MarkChang has boards from Digilent Inc.
10 each: D2SB-DIO4
10 each: Spartan-3
These boards are fully self-contained development kits. Everything you need (except software) is in the one box.
What software do we use? -- MarkChang
You can get free software from Xilinx to do all your development. The Xilinx Webpack ISE is a complete IDE for FPGA development. It includes a synthesizer, an HDL compiler, as well as all the bitstream generation and code-downloading utilities to support the devices we have. You need a parallel port to hook up the boards via JTAG cable. The simulator is Modelsim Xilinx Edition II, also free.
I suggest you register a common user for your group and obtain one product key. I think that will work. Or, you can use my information:
Name: Mark Chang
Product ID: KWW123456789Register for a product key here: Xilinx Webpack ISE
Download a copy of both Xilinx Webpack ISE and Modelsim XE-II here (instead of from Xilinx): http://fpga.olin.edu/nosync/fpga
A rather glitzy Flash tutorial for using the Xilinx ISE stuff: http://www.xilinx.com/products/cpldsolutions/flash/ise6/cplddemo.html
Helpful Links
A site that Chris found: http://www.opencores.org
What Sarah and Kathy are doing
- what are FPGAs good at?
- why/when are FPGAs better than regular software and CPUs?
- where is FPGA research going?
- what is the basic architecture of the fpga?
- where have FPGA architectual changes come in? How have these changes made FPGAs capable of doing new things? What applications have driven people to change FPGAs?
Kathy
Hea Joung Kim and William H. Mangione-Smith, "Factoring Large Numbers with Programmable Hardware, " 2000. http://www.sigda.org/Archives/ProceedingArchives/Compendiums/papers/2000/fpga00/pdffiles/2_2.pdf
Sarah
Elliptic Cryptography paper http://ieeexplore.ieee.org/iel5/7244/19546/00903394.pdf?isNumber=19546&arnumber=903394&prod=CNF&arSt=68&ared=76&arAuthor=Leung%2C+K.H.%3B+Ma%2C+K.W.%3B+Wong%2C+W.K.%3B+Leong%2C+P.H.W.
Both
- paper from Mark (first link on page)
Travelling Salesman paper http://scholar.google.com/scholar?hl=en&lr=&q=cache:GcQ-q-t_C2AJ:splish.ee.byu.edu/docs/spga96.ps.gz+genetic+algorithms+in+hardware+and+software+graham+nelson
More papers:
- An easier to read elliptic cryptography paper:
Using FPGAs to do encryption: http://lotus1000.usc.edu/prasanna/papers/dandalisOSEE00.pdf
FPGA Architecture, 4 inputs are best: http://ieeexplore.ieee.org/xpl/abs_free.jsp?arNumber=164048
Papers from Mark on FPGA architecture and other good stuff
- Read Kati's paper again. Section 4 is tools for FPGAs.
M. L. Chang, Variable Precision Analysis for FPGA Synthesis, Ph.D. Dissertation, University of Washington, Department of Electrical Engineering, 2004. Chapter 2 discusses FPGA technologies and basic tools for FPGAs. Section 5.5.1 discusses simulated annealing.
S. Hauck, Multi-FPGA Systems, Ph.D. Thesis, University of Washington, Dept. of C.S.&E., September, 1995. From page 36, discusses FPGA mapping, placement, and routing.
L. E. McMurchie, C. Ebeling, "PathFinder: A Negotiation-Based Performance-Driven Router for FPGAs", ACM/SIGDA International Symposium on Field Programmable Gate Arrays, pp. 111-117, 1995. Discusses the routing algorithm of choice, Pathfinder.
S. Kirkpatrick, C. D. Gelatt Jr., and M. P. Vecchi. Optimization by simulated annealing. Science, 220(4598):671–680, May 13 1983. The canonical work on simulated annealing (not necessarily for FPGAs). KATHY IS READING THIS
J.S. Rose, et al. Architecture of Field-Programmable Gate Arrays: The Effect of Logic Block Functionality on Area Efficiency. IEEE JSSC, October 1990. 25(5): pp. 1217-1225. 81 talks about the history and evolution of FPGAs (good paper). KATHY IS READING THIS
P. Chow, S. Seo, J. Rose, K. Chung, I Rahardja, and G. Paez, "The Design of an SRAM-Based Field-Programmable Gate Array: Part I: Architecture," in IEEE Transactions on VLSI, Vol. 7 No. 2, June 1999, pp. 191-197. A seminal work, part I.