The Verilog simulation system that we will be using is Cadence IUS. To get the correct file, please go to:

• http://acl.olin.edu/dists

Go into the "cadence" directory, and download the single file there:

• http://acl.olin.edu/dists/cadence/ISR200606192008_IUS54_wint_1of1.zip

Then, follow the basic instructions posted by IT:

• http://it.olin.edu/documents/Software/Installing_Cadence_IUS_5.4.pdf